 44f1bd9b3a
			
		
	
	
		44f1bd9b3a
		
			
		
	
	
	
	
		
			
			* ChibiOS 21.11.1 update. * `uf2-tinyuf2` => `tinyuf2` * Updated chibios-contrib, fixup preprocessor for tinyuf2 bootloader. * Fixup keychron L433 boards. * Makefile cleanup. * RISC-V build fixes. * Fixup RISC-V build.
		
			
				
	
	
		
			74 lines
		
	
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|     ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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| 
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|     Licensed under the Apache License, Version 2.0 (the "License");
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|     you may not use this file except in compliance with the License.
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|     You may obtain a copy of the License at
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| 
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|         http://www.apache.org/licenses/LICENSE-2.0
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| 
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|     Unless required by applicable law or agreed to in writing, software
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|     distributed under the License is distributed on an "AS IS" BASIS,
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|     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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|     See the License for the specific language governing permissions and
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|     limitations under the License.
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| */
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| 
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| #ifndef _MCUCONF_H_
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| #define _MCUCONF_H_
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| 
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| #define K20x_MCUCONF
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| 
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| /*
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|  * HAL driver system settings.
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|  */
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| 
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| #define K20x7
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| 
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| /* Select the MCU clocking mode below by enabling the appropriate block. */
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| 
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| #define KINETIS_NO_INIT             FALSE
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| 
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| /* PEE mode - 48MHz system clock driven by external crystal. */
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| #define KINETIS_MCG_MODE            KINETIS_MCG_MODE_PEE
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| #define KINETIS_PLLCLK_FREQUENCY    72000000UL
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| #define KINETIS_SYSCLK_FREQUENCY    72000000UL
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| #define KINETIS_BUSCLK_FREQUENCY    36000000UL
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| #define KINETIS_FLASHCLK_FREQUENCY  24000000UL
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| 
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| #if 0
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| /* FEI mode - 48 MHz with internal 32.768 kHz crystal */
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| #define KINETIS_MCG_MODE            KINETIS_MCG_MODE_FEI
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| #define KINETIS_MCG_FLL_DMX32       1           /* Fine-tune for 32.768 kHz */
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| #define KINETIS_MCG_FLL_DRS         1           /* 1464x FLL factor */
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| #define KINETIS_SYSCLK_FREQUENCY    47972352UL  /* 32.768 kHz * 1464 (~48 MHz) */
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| #define KINETIS_CLKDIV1_OUTDIV1     1
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| #define KINETIS_CLKDIV1_OUTDIV2     1
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| #define KINETIS_CLKDIV1_OUTDIV4     2
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| #define KINETIS_BUSCLK_FREQUENCY    KINETIS_SYSCLK_FREQUENCY
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| #define KINETIS_FLASHCLK_FREQUENCY  KINETIS_SYSCLK_FREQUENCY/2
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| #endif
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| 
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| /*
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|  * SERIAL driver system settings.
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|  */
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| #define KINETIS_SERIAL_USE_UART0            TRUE
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| #define KINETIS_SERIAL_USE_UART1            TRUE
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| 
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| /*
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|  * USB driver settings
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|  */
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| #define KINETIS_USB_USE_USB0                TRUE
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| /* Need to redefine this, since the default is for K20x */
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| /* This is for Teensy LC; you should comment it out (or change to 5)
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|  * for Teensy 3.x */
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| #define KINETIS_USB_USB0_IRQ_PRIORITY       5
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| 
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| /*
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|  * SPI driver system settings.
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|  */
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| #define KINETIS_SPI_USE_SPI0                TRUE
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| 
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| #define KINETIS_I2C_USE_I2C0                TRUE
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| 
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| #endif /* _MCUCONF_H_ */
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