71 lines
2 KiB
C
71 lines
2 KiB
C
/* Copyright 2023 Cipulot
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define MATRIX_ROWS 6
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#define MATRIX_COLS 16
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#define UNUSED_POSITIONS_LIST { {5, 3}, {5, 5} }
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#define MATRIX_ROW_PINS \
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{ B6, B5, B12, B10, B13, B7 }
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#define AMUX_COUNT 1
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#define AMUX_MAX_COLS_COUNT 16
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#define AMUX_EN_PINS \
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{ A8 }
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#define AMUX_SEL_PINS \
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{ B14, B15, A9, A10 }
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#define AMUX_COL_CHANNELS_SIZES \
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{ 16 }
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#define AMUX_0_COL_CHANNELS \
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{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
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#define AMUX_COL_CHANNELS AMUX_0_COL_CHANNELS
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#define DISCHARGE_PIN A4
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#define ANALOG_PORT A2
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#define DEFAULT_ACTUATION_MODE 0
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#define DEFAULT_MODE_0_ACTUATION_LEVEL 550
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#define DEFAULT_MODE_0_RELEASE_LEVEL 500
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#define DEFAULT_MODE_1_INITIAL_DEADZONE_OFFSET DEFAULT_MODE_0_ACTUATION_LEVEL
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#define DEFAULT_MODE_1_ACTUATION_OFFSET 70
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#define DEFAULT_MODE_1_RELEASE_OFFSET 70
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#define DEFAULT_EXTREMUM 1023
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#define EXPECTED_NOISE_FLOOR 0
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#define NOISE_FLOOR_THRESHOLD 50
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#define BOTTOMING_CALIBRATION_THRESHOLD 50
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#define DEFAULT_NOISE_FLOOR_SAMPLING_COUNT 30
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#define DEFAULT_BOTTOMING_READING 1023
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#define DEFAULT_CALIBRATION_STARTER true
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#define DISCHARGE_TIME 10
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// #define DEBUG_MATRIX_SCAN_RATE
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#define EECONFIG_KB_DATA_SIZE 201
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// PWM driver with direct memory access (DMA) support
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#define WS2812_PWM_DRIVER PWMD3
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#define WS2812_PWM_CHANNEL 1
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#define WS2812_PWM_PAL_MODE 2
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#define WS2812_DMA_STREAM STM32_DMA1_STREAM2
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#define WS2812_DMA_CHANNEL 5
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