Clean up and add more comments to the AVRISP-MKII project. Make sure the SPI_MULTI command handler supports multiple packet responses. Use slightly smaller/faster repeated indirect-load commands when retrieving the PDI target's memory CRCs.
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b0ce1eab66
commit
f3d370a777
10 changed files with 87 additions and 47 deletions
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@ -65,7 +65,9 @@ void ISPProtocol_EnterISPMode(void)
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ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS);
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SPI_Init(ISPTarget_GetSPIPrescalerMask() | SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
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/* Continuously attempt to synchronize with the target until either the number of attempts specified
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* by the host has exceeded, or the the device sends back the expected response values */
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while (Enter_ISP_Params.SynchLoops-- && (ResponseStatus == STATUS_CMD_FAILED))
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{
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uint8_t ResponseBytes[4];
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@ -110,6 +112,7 @@ void ISPProtocol_LeaveISPMode(void)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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/* Perform pre-exit delay, release the target /RESET, disable the SPI bus and perform the post-exit delay */
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ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS);
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ISPTarget_ChangeTargetResetLine(false);
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SPI_ShutDown();
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@ -166,6 +169,9 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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Write_Memory_Params.PollValue2;
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uint8_t* NextWriteByte = Write_Memory_Params.ProgData;
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/* Check to see if the host has issued a SET ADDRESS command and we haven't sent a
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* LOAD EXTENDED ADDRESS command (if needed, used when operating beyond the 128KB
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* FLASH barrier) */
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if (MustSetAddress)
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{
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if (CurrentAddress & (1UL << 31))
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@ -174,6 +180,7 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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MustSetAddress = false;
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}
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/* Check the programming mode desired by the host, either Paged or Word memory writes */
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if (Write_Memory_Params.ProgrammingMode & PROG_MODE_PAGED_WRITES_MASK)
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{
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uint16_t StartAddress = (CurrentAddress & 0xFFFF);
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@ -184,16 +191,16 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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bool IsOddByte = (CurrentByte & 0x01);
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uint8_t ByteToWrite = *(NextWriteByte++);
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if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))
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Write_Memory_Params.ProgrammingCommands[0] |= READ_WRITE_HIGH_BYTE_MASK;
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else
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Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;
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SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
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SPI_SendByte(CurrentAddress >> 8);
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SPI_SendByte(CurrentAddress & 0xFF);
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SPI_SendByte(ByteToWrite);
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/* AVR FLASH addressing requires us to modify the write command based on if we are writing a high
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* or low byte at the current word address */
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Write_Memory_Params.ProgrammingCommands[0] ^= READ_WRITE_HIGH_BYTE_MASK;
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/* Check to see the write completion method, to see if we have a valid polling address */
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if (!(PollAddress) && (ByteToWrite != PollValue))
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{
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if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))
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@ -289,6 +296,9 @@ void ISPProtocol_ReadMemory(uint8_t V2Command)
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Endpoint_Write_Byte(V2Command);
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Endpoint_Write_Byte(STATUS_CMD_OK);
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/* Check to see if the host has issued a SET ADDRESS command and we haven't sent a
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* LOAD EXTENDED ADDRESS command (if needed, used when operating beyond the 128KB
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* FLASH barrier) */
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if (MustSetAddress)
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{
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if (CurrentAddress & (1UL << 31))
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@ -297,28 +307,30 @@ void ISPProtocol_ReadMemory(uint8_t V2Command)
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MustSetAddress = false;
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}
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/* Read each byte from the device and write them to the packet for the host */
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for (uint16_t CurrentByte = 0; CurrentByte < Read_Memory_Params.BytesToRead; CurrentByte++)
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{
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bool IsOddByte = (CurrentByte & 0x01);
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if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))
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Read_Memory_Params.ReadMemoryCommand |= READ_WRITE_HIGH_BYTE_MASK;
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else
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Read_Memory_Params.ReadMemoryCommand &= ~READ_WRITE_HIGH_BYTE_MASK;
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/* Read the next byte from the desired memory space in the device */
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SPI_SendByte(Read_Memory_Params.ReadMemoryCommand);
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SPI_SendByte(CurrentAddress >> 8);
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SPI_SendByte(CurrentAddress & 0xFF);
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Endpoint_Write_Byte(SPI_ReceiveByte());
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/* Check if the endpoint bank is currently full */
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/* Check if the endpoint bank is currently full, if so send the packet */
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if (!(Endpoint_IsReadWriteAllowed()))
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{
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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if ((IsOddByte && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))
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/* AVR FLASH addressing requires us to modify the read command based on if we are reading a high
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* or low byte at the current word address */
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if (V2Command == CMD_READ_FLASH_ISP)
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Read_Memory_Params.ReadMemoryCommand ^= READ_WRITE_HIGH_BYTE_MASK;
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/* Only increment the current address if we have read both bytes in the current word when in FLASH
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* read mode, or for each byte when in EEPROM read mode */
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if (((CurrentByte & 0x01) && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))
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CurrentAddress++;
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}
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@ -353,9 +365,11 @@ void ISPProtocol_ChipErase(void)
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uint8_t ResponseStatus = STATUS_CMD_OK;
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/* Send the chip erase commands as given by the host to the device */
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for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++)
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SPI_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);
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/* Use appropriate command completion check as given by the host (delay or busy polling) */
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if (!(Erase_Chip_Params.PollMethod))
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ISPProtocol_DelayMS(Erase_Chip_Params.EraseDelayMS);
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else
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@ -385,7 +399,8 @@ void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command)
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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uint8_t ResponseBytes[4];
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/* Send the Fuse or Lock byte read commands as given by the host to the device, store response */
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for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)
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ResponseBytes[RByte] = SPI_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);
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@ -413,6 +428,7 @@ void ISPProtocol_WriteFuseLock(uint8_t V2Command)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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/* Send the Fuse or Lock byte program commands as given by the host to the device */
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for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++)
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SPI_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);
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@ -463,12 +479,29 @@ void ISPProtocol_SPIMulti(void)
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Endpoint_Write_Byte(SPI_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));
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else
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Endpoint_Write_Byte(SPI_ReceiveByte());
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/* Check to see if we have filled the endpoint bank and need to send the packet */
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if (!(Endpoint_IsReadWriteAllowed()))
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{
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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CurrRxPos++;
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}
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Endpoint_Write_Byte(STATUS_CMD_OK);
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bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed());
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Endpoint_ClearIN();
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/* Ensure last packet is a short packet to terminate the transfer */
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if (IsEndpointFull)
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{
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Endpoint_WaitUntilReady();
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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}
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#endif
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