Update Doxygen configuration files to the latest Doxygen version.

This commit is contained in:
Dean Camera 2010-01-06 13:37:29 +00:00
parent d97db1120b
commit efb6c35778
69 changed files with 44682 additions and 39762 deletions

View file

@ -53,14 +53,14 @@ uint8_t ISPTarget_GetSPIPrescalerMask(void)
SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_64 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
#elif (F_CPU == 16000000)
SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI
SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
#else
#error No SPI prescaler masks for chosen F_CPU speed.
@ -171,7 +171,7 @@ uint8_t ISPTarget_WaitWhileTargetBusy(void)
*/
void ISPTarget_LoadExtendedAddress(void)
{
SPI_SendByte(0x4D);
SPI_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
SPI_SendByte(0x00);
SPI_SendByte((CurrentAddress & 0x00FF0000) >> 16);
SPI_SendByte(0x00);

View file

@ -58,6 +58,8 @@
/** Total number of allowable ISP programming speeds supported by the device */
#define TOTAL_ISP_PROGRAMMING_SPEEDS 7
#define LOAD_EXTENDED_ADDRESS_CMD 0x4D
/* Function Prototypes: */
uint8_t ISPTarget_GetSPIPrescalerMask(void);
void ISPTarget_ChangeTargetResetLine(const bool ResetTarget);

View file

@ -159,7 +159,7 @@ void XPROGTarget_EnableTargetPDI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 1000000UL);
UBRR1 = (F_CPU / 500000UL);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else
@ -201,7 +201,7 @@ void XPROGTarget_EnableTargetTPI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 1000000UL);
UBRR1 = (F_CPU / 500000UL);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else