Added start of a port of the core USB driver code to the AVR32 UC3B architecture.
This commit is contained in:
Dean Camera
parent
f3ec62b5c6
commit
cad5e9ffca
36 changed files with 5028 additions and 45 deletions
|
|
@ -197,11 +197,6 @@
|
|||
*/
|
||||
#define ENDPOINT_EPDIR_MASK 0x80
|
||||
|
||||
/** Endpoint bank size mask, for masking against endpoint addresses to retrieve the endpoint's
|
||||
* bank size in the device.
|
||||
*/
|
||||
#define ENDPOINT_EPSIZE_MASK 0x7F
|
||||
|
||||
/** Retrives the maximum bank size in bytes of a given endpoint.
|
||||
*
|
||||
* \note This macro will only work correctly on endpoint indexes that are compile-time constants
|
||||
|
|
@ -306,7 +301,7 @@
|
|||
const uint16_t Size,
|
||||
const uint8_t Banks)
|
||||
{
|
||||
return Endpoint_ConfigureEndpoint_Prv(Number, (((Type) << EPTYPE0) | (Direction)),
|
||||
return Endpoint_ConfigureEndpoint_Prv(Number, ((Type << EPTYPE0) | Direction),
|
||||
((1 << ALLOC) | Banks | Endpoint_BytesToEPSizeMask(Size)));
|
||||
}
|
||||
|
||||
|
|
@ -406,22 +401,6 @@
|
|||
return ((UECONX & (1 << EPEN)) ? true : false);
|
||||
}
|
||||
|
||||
/** Aborts all pending IN transactions on the currently selected endpoint, once the bank
|
||||
* has been queued for transmission to the host via \ref Endpoint_ClearIN(). This function
|
||||
* will terminate all queued transactions, resetting the endpoint banks ready for a new
|
||||
* packet.
|
||||
*
|
||||
* \ingroup Group_EndpointPacketManagement_AVR8
|
||||
*/
|
||||
static inline void Endpoint_AbortPendingIN(void)
|
||||
{
|
||||
while (UESTA0X & (0x03 << NBUSYBK0))
|
||||
{
|
||||
UEINTX |= (1 << RXOUTI);
|
||||
while (UEINTX & (1 << RXOUTI));
|
||||
}
|
||||
}
|
||||
|
||||
/** Retrieves the number of busy banks in the currently selected endpoint, which have been queued for
|
||||
* transmission via the \ref Endpoint_ClearIN() command, or are awaiting acknowledgement via the
|
||||
* \ref Endpoint_ClearOUT() command.
|
||||
|
|
@ -435,6 +414,22 @@
|
|||
return (UESTA0X & (0x03 << NBUSYBK0));
|
||||
}
|
||||
|
||||
/** Aborts all pending IN transactions on the currently selected endpoint, once the bank
|
||||
* has been queued for transmission to the host via \ref Endpoint_ClearIN(). This function
|
||||
* will terminate all queued transactions, resetting the endpoint banks ready for a new
|
||||
* packet.
|
||||
*
|
||||
* \ingroup Group_EndpointPacketManagement_AVR8
|
||||
*/
|
||||
static inline void Endpoint_AbortPendingIN(void)
|
||||
{
|
||||
while (Endpoint_GetBusyBanks() != 0)
|
||||
{
|
||||
UEINTX |= (1 << RXOUTI);
|
||||
while (UEINTX & (1 << RXOUTI));
|
||||
}
|
||||
}
|
||||
|
||||
/** Determines if the currently selected endpoint may be read from (if data is waiting in the endpoint
|
||||
* bank and the endpoint is an OUT direction, or if the bank is not yet full if the endpoint is an IN
|
||||
* direction). This function will return false if an error has occurred in the endpoint, if the endpoint
|
||||
|
|
@ -484,7 +479,7 @@
|
|||
static inline bool Endpoint_HasEndpointInterrupted(const uint8_t EndpointNumber) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
|
||||
static inline bool Endpoint_HasEndpointInterrupted(const uint8_t EndpointNumber)
|
||||
{
|
||||
return ((UEINT & (1 << EndpointNumber)) ? true : false);
|
||||
return ((Endpoint_GetEndpointInterrupts() & (1 << EndpointNumber)) ? true : false);
|
||||
}
|
||||
|
||||
/** Determines if the selected IN endpoint is ready for a new packet to be sent to the host.
|
||||
|
|
|
|||
|
|
@ -57,31 +57,31 @@
|
|||
/* Private Interface - For use in library only: */
|
||||
#if !defined(__DOXYGEN__)
|
||||
/* Macros: */
|
||||
#define USB_INT_Enable(int) MACROS{ USB_INT_GET_EN_REG(int) |= USB_INT_GET_EN_MASK(int); }MACROE
|
||||
#define USB_INT_Disable(int) MACROS{ USB_INT_GET_EN_REG(int) &= ~(USB_INT_GET_EN_MASK(int)); }MACROE
|
||||
#define USB_INT_Clear(int) MACROS{ USB_INT_GET_INT_REG(int) &= ~(USB_INT_GET_INT_MASK(int)); }MACROE
|
||||
#define USB_INT_IsEnabled(int) ((USB_INT_GET_EN_REG(int) & USB_INT_GET_EN_MASK(int)) ? true : false)
|
||||
#define USB_INT_HasOccurred(int) ((USB_INT_GET_INT_REG(int) & USB_INT_GET_INT_MASK(int)) ? true : false)
|
||||
#define USB_INT_Enable(int) MACROS{ USB_INT_GET_EN_REG(int) |= USB_INT_GET_EN_MASK(int); }MACROE
|
||||
#define USB_INT_Disable(int) MACROS{ USB_INT_GET_EN_REG(int) &= ~(USB_INT_GET_EN_MASK(int)); }MACROE
|
||||
#define USB_INT_Clear(int) MACROS{ USB_INT_GET_INT_REG(int) &= ~(USB_INT_GET_INT_MASK(int)); }MACROE
|
||||
#define USB_INT_IsEnabled(int) ((USB_INT_GET_EN_REG(int) & USB_INT_GET_EN_MASK(int)) ? true : false)
|
||||
#define USB_INT_HasOccurred(int) ((USB_INT_GET_INT_REG(int) & USB_INT_GET_INT_MASK(int)) ? true : false)
|
||||
|
||||
#define USB_INT_GET_EN_REG(EnableReg, EnableMask, FlagReg, FlagMask) EnableReg
|
||||
#define USB_INT_GET_EN_MASK(EnableReg, EnableMask, FlagReg, FlagMask) EnableMask
|
||||
#define USB_INT_GET_INT_REG(EnableReg, EnableMask, FlagReg, FlagMask) FlagReg
|
||||
#define USB_INT_GET_INT_MASK(EnableReg, EnableMask, FlagReg, FlagMask) FlagMask
|
||||
|
||||
#define USB_INT_VBUS USBCON, (1 << VBUSTE) , USBINT, (1 << VBUSTI)
|
||||
#define USB_INT_IDTI USBCON, (1 << IDTE) , USBINT, (1 << IDTI)
|
||||
#define USB_INT_WAKEUPI UDIEN , (1 << WAKEUPE), UDINT , (1 << WAKEUPI)
|
||||
#define USB_INT_SUSPI UDIEN , (1 << SUSPE) , UDINT , (1 << SUSPI)
|
||||
#define USB_INT_EORSTI UDIEN , (1 << EORSTE) , UDINT , (1 << EORSTI)
|
||||
#define USB_INT_DCONNI UHIEN , (1 << DCONNE) , UHINT , (1 << DCONNI)
|
||||
#define USB_INT_DDISCI UHIEN , (1 << DDISCE) , UHINT , (1 << DDISCI)
|
||||
#define USB_INT_BCERRI OTGIEN, (1 << BCERRE) , OTGINT, (1 << BCERRI)
|
||||
#define USB_INT_VBERRI OTGIEN, (1 << VBERRE) , OTGINT, (1 << VBERRI)
|
||||
#define USB_INT_SOFI UDIEN, (1 << SOFE) , UDINT , (1 << SOFI)
|
||||
#define USB_INT_HSOFI UHIEN, (1 << HSOFE) , UHINT , (1 << HSOFI)
|
||||
#define USB_INT_RSTI UHIEN , (1 << RSTE) , UHINT , (1 << RSTI)
|
||||
#define USB_INT_SRPI OTGIEN, (1 << SRPE) , OTGINT, (1 << SRPI)
|
||||
#define USB_INT_RXSTPI UEIENX, (1 << RXSTPE) , UEINTX, (1 << RXSTPI)
|
||||
#define USB_INT_VBUS USBCON, (1 << VBUSTE) , USBINT, (1 << VBUSTI)
|
||||
#define USB_INT_IDTI USBCON, (1 << IDTE) , USBINT, (1 << IDTI)
|
||||
#define USB_INT_WAKEUPI UDIEN , (1 << WAKEUPE), UDINT , (1 << WAKEUPI)
|
||||
#define USB_INT_SUSPI UDIEN , (1 << SUSPE) , UDINT , (1 << SUSPI)
|
||||
#define USB_INT_EORSTI UDIEN , (1 << EORSTE) , UDINT , (1 << EORSTI)
|
||||
#define USB_INT_DCONNI UHIEN , (1 << DCONNE) , UHINT , (1 << DCONNI)
|
||||
#define USB_INT_DDISCI UHIEN , (1 << DDISCE) , UHINT , (1 << DDISCI)
|
||||
#define USB_INT_BCERRI OTGIEN, (1 << BCERRE) , OTGINT, (1 << BCERRI)
|
||||
#define USB_INT_VBERRI OTGIEN, (1 << VBERRE) , OTGINT, (1 << VBERRI)
|
||||
#define USB_INT_SOFI UDIEN, (1 << SOFE) , UDINT , (1 << SOFI)
|
||||
#define USB_INT_HSOFI UHIEN, (1 << HSOFE) , UHINT , (1 << HSOFI)
|
||||
#define USB_INT_RSTI UHIEN , (1 << RSTE) , UHINT , (1 << RSTI)
|
||||
#define USB_INT_SRPI OTGIEN, (1 << SRPE) , OTGINT, (1 << SRPI)
|
||||
#define USB_INT_RXSTPI UEIENX, (1 << RXSTPE) , UEINTX, (1 << RXSTPI)
|
||||
|
||||
/* Includes: */
|
||||
#include "../USBMode.h"
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue