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Bring supported STM32F4 configs in line with F4x1 (#24413)

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Co-authored-by: Sergey Vlasov <sigprof@gmail.com>
This commit is contained in:
Drashna Jaelre 2024-11-21 03:54:01 -08:00 • committed by GitHub
parent 36b5559b99
commit c7a04bd930
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
19 changed files with 142 additions and 188 deletions
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5
platforms/chibios/boards/common/ld/STM32F401xC.ld
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@ -5,6 +5,9 @@
*/
f4xx_flash_size = 256k;
f4xx_ram_size = 64k;
f4xx_ram1_size = 64k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_common.ld

5
platforms/chibios/boards/common/ld/STM32F401xC_tinyuf2.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 256k;
f4xx_ram_size = 64k;
f4xx_ram1_size = 64k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_tinyuf2_common.ld

5
platforms/chibios/boards/common/ld/STM32F401xE.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 512k;
f4xx_ram_size = 96k;
f4xx_ram1_size = 96k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_common.ld

5
platforms/chibios/boards/common/ld/STM32F401xE_tinyuf2.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 512k;
f4xx_ram_size = 96k;
f4xx_ram1_size = 96k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_tinyuf2_common.ld

91
platforms/chibios/boards/common/ld/STM32F405xG.ld
View file

@ -1,86 +1,13 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F405xG memory setup.
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY
{
flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */
flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */
flash2 (rx) : org = 0x08008000, len = 1M - 32k /* Sector 2..6 - Rest of firmware */
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/
f4xx_flash_size = 1M;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 64k;
f4xx_ram5_size = 4k;
/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash2);
REGION_ALIAS("XTORS_FLASH_LMA", flash2);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash2);
REGION_ALIAS("TEXT_FLASH_LMA", flash2);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash2);
REGION_ALIAS("RODATA_FLASH_LMA", flash2);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash2);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
/* Generic rules inclusion.*/
INCLUDE rules.ld
INCLUDE stm32f4xx_common.ld

94
platforms/chibios/boards/common/ld/STM32F405xG_tinyuf2.ld
View file

@ -1,89 +1,13 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* STM32F405xG memory setup.
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY
{
flash0 (rx) : org = 0x08000000 + 64k, len = 1M - 64k /* tinyuf2 bootloader requires app to be located at 64k offset for this MCU */
flash1 (rx) : org = 0x00000000, len = 0
flash2 (rx) : org = 0x00000000, len = 0
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/
f4xx_flash_size = 1M;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 64k;
f4xx_ram5_size = 4k;
/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
/* Generic rules inclusion.*/
INCLUDE rules.ld
/* TinyUF2 bootloader reset support */
_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */
INCLUDE stm32f4xx_tinyuf2_common.ld

13
platforms/chibios/boards/common/ld/STM32F407xE.ld Normal file
View file

@ -0,0 +1,13 @@
/*
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
f4xx_flash_size = 512k;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 64k;
f4xx_ram5_size = 4k;
INCLUDE stm32f4xx_common.ld

13
platforms/chibios/boards/common/ld/STM32F407xE_tinyuf2.ld Normal file
View file

@ -0,0 +1,13 @@
/*
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
f4xx_flash_size = 512k;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 64k;
f4xx_ram5_size = 4k;
INCLUDE stm32f4xx_tinyuf2_common.ld

5
platforms/chibios/boards/common/ld/STM32F411xC.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 256k;
f4xx_ram_size = 128k;
f4xx_ram1_size = 128k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_common.ld

5
platforms/chibios/boards/common/ld/STM32F411xC_tinyuf2.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 256k;
f4xx_ram_size = 128k;
f4xx_ram1_size = 128k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_tinyuf2_common.ld

5
platforms/chibios/boards/common/ld/STM32F411xE.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 512k;
f4xx_ram_size = 128k;
f4xx_ram1_size = 128k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_common.ld

5
platforms/chibios/boards/common/ld/STM32F411xE_tinyuf2.ld
View file

@ -5,6 +5,9 @@
*/
f4xx_flash_size = 512k;
f4xx_ram_size = 128k;
f4xx_ram1_size = 128k;
f4xx_ram2_size = 0;
f4xx_ram4_size = 0;
f4xx_ram5_size = 0;
INCLUDE stm32f4xx_tinyuf2_common.ld

13
platforms/chibios/boards/common/ld/STM32F446xE.ld Normal file
View file

@ -0,0 +1,13 @@
/*
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
f4xx_flash_size = 512k;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 0;
f4xx_ram5_size = 4k;
INCLUDE stm32f4xx_common.ld

13
platforms/chibios/boards/common/ld/STM32F446xE_tinyuf2.ld Normal file
View file

@ -0,0 +1,13 @@
/*
* Copyright 2006..2018 Giovanni Di Sirio
* Copyright 2022 QMK contributors
* SPDX-License-Identifier: GPL-2.0-or-later
*/
f4xx_flash_size = 512k;
f4xx_ram1_size = 112k;
f4xx_ram2_size = 16k;
f4xx_ram4_size = 0;
f4xx_ram5_size = 4k;
INCLUDE stm32f4xx_tinyuf2_common.ld

11
platforms/chibios/boards/common/ld/stm32f4xx_common.ld
View file

@ -24,12 +24,12 @@ MEMORY
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = f4xx_ram_size
ram1 (wx) : org = 0x00000000, len = 0
ram2 (wx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */
ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */
ram2 (wx) : org = 0x20000000 + f4xx_ram1_size, len = f4xx_ram2_size /* SRAM2 */
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */
ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
@ -80,4 +80,3 @@ REGION_ALIAS("HEAP_RAM", ram0);
/* Generic rules inclusion.*/
INCLUDE rules.ld

12
platforms/chibios/boards/common/ld/stm32f4xx_tinyuf2_common.ld
View file

@ -27,12 +27,12 @@ MEMORY
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = f4xx_ram_size
ram1 (wx) : org = 0x00000000, len = 0
ram2 (wx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = f4xx_ram1_size + f4xx_ram2_size /* SRAM1 + SRAM2 */
ram1 (wx) : org = 0x20000000, len = f4xx_ram1_size /* SRAM1 */
ram2 (wx) : org = 0x20000000 + f4xx_ram1_size, len = f4xx_ram2_size /* SRAM2 */
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x10000000, len = f4xx_ram4_size /* CCM SRAM */
ram5 (wx) : org = 0x40024000, len = f4xx_ram5_size /* BCKP SRAM */
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
@ -86,5 +86,3 @@ INCLUDE rules.ld
/* TinyUF2 bootloader reset support */
_board_dfu_dbl_tap = ORIGIN(ram0) + 64k - 4; /* this is based off the linker file for tinyuf2 */