Move RNDISConstants.h into the RNDIS class driver common definition header.
Add logical grouping of related #define values for better Doxygen documentation.
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23 changed files with 272 additions and 149 deletions
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@ -71,6 +71,8 @@
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/* Public Interface - May be used in end-application: */
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/* Macros: */
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/** \name ADC Reference Configuration Masks */
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//@{
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/** Reference mask, for using the voltage present at the AVR's AREF pin for the ADC reference. */
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#define ADC_REFERENCE_AREF 0
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@ -79,7 +81,10 @@
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/** Reference mask, for using the internally generated 2.56V reference voltage as the ADC reference. */
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#define ADC_REFERENCE_INT2560MV ((1 << REFS1) | (1 << REFS0))
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//@}
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/** \name ADC Result Adjustment Configuration Masks */
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//@{
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/** Left-adjusts the 10-bit ADC result, so that the upper 8 bits of the value returned by the
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* ADC_GetResult() macro contain the 8 most significant bits of the result.
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*/
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@ -89,7 +94,10 @@
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* ADC_GetResult() macro contain the 8 least significant bits of the result.
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*/
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#define ADC_RIGHT_ADJUSTED (0 << ADLAR)
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//@}
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/** \name ADC Mode Configuration Masks */
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//@{
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/** Sets the ADC mode to free running, so that conversions take place continuously as fast as the ADC
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* is capable of at the given input clock speed.
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*/
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@ -99,7 +107,10 @@
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* the ADC returns to idle.
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*/
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#define ADC_SINGLE_CONVERSION (0 << ADATE)
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//@}
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/** \name ADC Prescaler Configuration Masks */
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//@{
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/** Sets the ADC input clock to prescale by a factor of 2 the AVR's system clock. */
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#define ADC_PRESCALE_2 (1 << ADPS0)
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@ -120,7 +131,9 @@
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/** Sets the ADC input clock to prescale by a factor of 128 the AVR's system clock. */
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#define ADC_PRESCALE_128 ((1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
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//@}
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/** \name ADC MUX Masks */
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//@{
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/** MUX mask define for the ADC0 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
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#define ADC_CHANNEL0 (0x00 << MUX0)
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@ -67,6 +67,8 @@
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/* Public Interface - May be used in end-application: */
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/* Macros: */
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/** \name SPI Prescaler Configuration Masks */
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//@{
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/** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 2. */
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#define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED
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@ -87,31 +89,44 @@
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/** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 128. */
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#define SPI_SPEED_FCPU_DIV_128 ((1 << SPR1) | (1 << SPR0))
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//@}
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/** \name SPI SCK Polarity Configuration Masks */
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//@{
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/** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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#define SPI_SCK_LEAD_RISING (0 << CPOL)
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/** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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#define SPI_SCK_LEAD_FALLING (1 << CPOL)
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//@}
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/** \name SPI Sample Edge Configuration Masks */
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//@{
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/** SPI data sample mode mask for SPI_Init(). Indicates that the data should sampled on the leading edge. */
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#define SPI_SAMPLE_LEADING (0 << CPHA)
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/** SPI data sample mode mask for SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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#define SPI_SAMPLE_TRAILING (1 << CPHA)
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//@}
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/** \name SPI Data Ordering Configuration Masks */
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//@{
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/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
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#define SPI_ORDER_MSB_FIRST (0 << DORD)
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/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
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#define SPI_ORDER_LSB_FIRST (1 << DORD)
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//@}
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/** \name SPI Mode Configuration Masks */
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//@{
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/** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
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#define SPI_MODE_SLAVE (0 << MSTR)
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/** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
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#define SPI_MODE_MASTER (1 << MSTR)
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//@}
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/* Inline Functions: */
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/** Initialises the SPI subsystem, ready for transfers. Must be called before calling any other
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* SPI routines.
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