Move RNDISConstants.h into the RNDIS class driver common definition header.

Add logical grouping of related #define values for better Doxygen documentation.
This commit is contained in:
Dean Camera 2010-10-28 07:52:52 +00:00
parent cb779e3d7d
commit b120c4e4cd
23 changed files with 272 additions and 149 deletions

View file

@ -71,6 +71,8 @@
/* Public Interface - May be used in end-application: */
/* Macros: */
/** \name ADC Reference Configuration Masks */
//@{
/** Reference mask, for using the voltage present at the AVR's AREF pin for the ADC reference. */
#define ADC_REFERENCE_AREF 0
@ -79,7 +81,10 @@
/** Reference mask, for using the internally generated 2.56V reference voltage as the ADC reference. */
#define ADC_REFERENCE_INT2560MV ((1 << REFS1) | (1 << REFS0))
//@}
/** \name ADC Result Adjustment Configuration Masks */
//@{
/** Left-adjusts the 10-bit ADC result, so that the upper 8 bits of the value returned by the
* ADC_GetResult() macro contain the 8 most significant bits of the result.
*/
@ -89,7 +94,10 @@
* ADC_GetResult() macro contain the 8 least significant bits of the result.
*/
#define ADC_RIGHT_ADJUSTED (0 << ADLAR)
//@}
/** \name ADC Mode Configuration Masks */
//@{
/** Sets the ADC mode to free running, so that conversions take place continuously as fast as the ADC
* is capable of at the given input clock speed.
*/
@ -99,7 +107,10 @@
* the ADC returns to idle.
*/
#define ADC_SINGLE_CONVERSION (0 << ADATE)
//@}
/** \name ADC Prescaler Configuration Masks */
//@{
/** Sets the ADC input clock to prescale by a factor of 2 the AVR's system clock. */
#define ADC_PRESCALE_2 (1 << ADPS0)
@ -120,7 +131,9 @@
/** Sets the ADC input clock to prescale by a factor of 128 the AVR's system clock. */
#define ADC_PRESCALE_128 ((1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
//@}
/** \name ADC MUX Masks */
//@{
/** MUX mask define for the ADC0 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
#define ADC_CHANNEL0 (0x00 << MUX0)

View file

@ -67,6 +67,8 @@
/* Public Interface - May be used in end-application: */
/* Macros: */
/** \name SPI Prescaler Configuration Masks */
//@{
/** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 2. */
#define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED
@ -87,31 +89,44 @@
/** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 128. */
#define SPI_SPEED_FCPU_DIV_128 ((1 << SPR1) | (1 << SPR0))
//@}
/** \name SPI SCK Polarity Configuration Masks */
//@{
/** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the rising edge. */
#define SPI_SCK_LEAD_RISING (0 << CPOL)
/** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the falling edge. */
#define SPI_SCK_LEAD_FALLING (1 << CPOL)
//@}
/** \name SPI Sample Edge Configuration Masks */
//@{
/** SPI data sample mode mask for SPI_Init(). Indicates that the data should sampled on the leading edge. */
#define SPI_SAMPLE_LEADING (0 << CPHA)
/** SPI data sample mode mask for SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
#define SPI_SAMPLE_TRAILING (1 << CPHA)
//@}
/** \name SPI Data Ordering Configuration Masks */
//@{
/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_MSB_FIRST (0 << DORD)
/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_LSB_FIRST (1 << DORD)
//@}
/** \name SPI Mode Configuration Masks */
//@{
/** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
#define SPI_MODE_SLAVE (0 << MSTR)
/** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
#define SPI_MODE_MASTER (1 << MSTR)
//@}
/* Inline Functions: */
/** Initialises the SPI subsystem, ready for transfers. Must be called before calling any other
* SPI routines.