Fix inverted bit-banged USART logic in the AVRISP project for PDI programming. Add a delay to the clock toggling in the AVRISP project to ensure that the programming speed does not exceed 10MHz under any conditions to satisfy the limits in the datasheet for all target voltages. Fix incorrect pin being used as the DATA in in PDI programming mode.

This commit is contained in:
Dean Camera 2009-12-09 12:01:01 +00:00
parent e4cfd5208f
commit 9c8ed168e5
6 changed files with 10 additions and 9 deletions

View file

@ -110,9 +110,7 @@ static void PDIProtocol_EnterXPROGMode(void)
/* Must hold DATA line high for at least 90nS to enable PDI interface */
PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;
asm volatile ("NOP"::);
#if (F_CPU > 8000000)
asm volatile ("NOP"::);
#endif
/* Toggle CLOCK line 16 times within 100uS of the original 90nS timeout to keep PDI interface enabled */
for (uint8_t i = 0; i < 16; i++)
@ -120,7 +118,7 @@ static void PDIProtocol_EnterXPROGMode(void)
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
PDITarget_SendByte(PDI_CMD_KEY);
for (uint8_t i = 0; i < 8; i++)
for (uint8_t i = 0; i < sizeof(PDI_NVMENABLE_KEY); i++)
PDITarget_SendByte(PDI_NVMENABLE_KEY[i]);
/* Read out the STATUS register to check that NVM access was successfully enabled */