Software PDI mode breaks unless the software USART has 100 cycles between bits.
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7d51e51c79
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8 changed files with 20 additions and 22 deletions
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@ -65,7 +65,7 @@ static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
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*/
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static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)
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{
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/* The TPI command for writing to the I/O space uses weird addressing, where the I/O address's upper
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/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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@ -175,10 +175,6 @@ static void XPROGProtocol_LeaveXPROGMode(void)
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/* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
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XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
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XPROGTarget_SendByte(0x00);
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/* Clear /RESET key twice (for some reason this needs to be done twice to take effect) */
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XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
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XPROGTarget_SendByte(0x00);
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XPROGTarget_DisableTargetPDI();
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}
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@ -162,7 +162,7 @@ void XPROGTarget_EnableTargetPDI(void)
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/* Set up the synchronous USART for XMEGA communications -
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8 data bits, even parity, 2 stop bits */
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UBRR1 = (F_CPU / 500000UL);
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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#else
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@ -203,7 +203,7 @@ void XPROGTarget_EnableTargetTPI(void)
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/* Set up the synchronous USART for TINY communications -
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8 data bits, even parity, 2 stop bits */
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UBRR1 = (F_CPU / 500000UL);
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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#else
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@ -239,16 +239,18 @@ void XPROGTarget_DisableTargetPDI(void)
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/* Tristate all pins */
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DDRD &= ~((1 << 5) | (1 << 3));
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PORTD &= ~((1 << 3) | (1 << 2));
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PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
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#else
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/* Turn off software USART management timer */
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TCCR1B = 0;
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/* Tristate all pins */
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/* Set DATA and CLOCK lines to inputs */
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BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
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BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;
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BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
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/* Tristate DATA and CLOCK lines */
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
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#endif
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}
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@ -58,7 +58,7 @@
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/* Defines: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#define XPROG_VIA_HARDWARE_USART
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#else
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#else
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#define BITBANG_PDIDATA_PORT PORTB
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#define BITBANG_PDIDATA_DDR DDRB
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#define BITBANG_PDIDATA_PIN PINB
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@ -80,8 +80,11 @@
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#define BITBANG_TPICLOCK_MASK (1 << 1)
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#endif
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/** Serial carrier TPI/PDI speed when hardware TPI/PDI mode is used */
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#define XPROG_HARDWARE_SPEED 500000
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/** Number of cycles between each clock when software USART mode is used */
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#define BITS_BETWEEN_USART_CLOCKS 80
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#define BITS_BETWEEN_USART_CLOCKS 100
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/** Total number of bits in a single USART frame */
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#define BITS_IN_USART_FRAME 12
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@ -66,7 +66,7 @@ MCU = at90usb1287
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# Target board (see library "Board Types" documentation, NONE for projects not requiring
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# LUFA board drivers). If USER is selected, put custom board drivers in a directory called
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# "Board" inside the application directory.
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BOARD = XPLAIN
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BOARD = USBKEY
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# Processor frequency.
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