Software PDI mode breaks unless the software USART has 100 cycles between bits.

This commit is contained in:
Dean Camera 2010-03-17 11:48:39 +00:00
parent 7d51e51c79
commit 9a5ae36a4f
8 changed files with 20 additions and 22 deletions

View file

@ -65,7 +65,7 @@ static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
*/
static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)
{
/* The TPI command for writing to the I/O space uses weird addressing, where the I/O address's upper
/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
* two bits of the 6-bit address are shifted left once */
XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));
}

View file

@ -175,10 +175,6 @@ static void XPROGProtocol_LeaveXPROGMode(void)
/* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
XPROGTarget_SendByte(0x00);
/* Clear /RESET key twice (for some reason this needs to be done twice to take effect) */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
XPROGTarget_SendByte(0x00);
XPROGTarget_DisableTargetPDI();
}

View file

@ -162,7 +162,7 @@ void XPROGTarget_EnableTargetPDI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 500000UL);
UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else
@ -203,7 +203,7 @@ void XPROGTarget_EnableTargetTPI(void)
/* Set up the synchronous USART for TINY communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 500000UL);
UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else
@ -239,16 +239,18 @@ void XPROGTarget_DisableTargetPDI(void)
/* Tristate all pins */
DDRD &= ~((1 << 5) | (1 << 3));
PORTD &= ~((1 << 3) | (1 << 2));
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
#else
/* Turn off software USART management timer */
TCCR1B = 0;
/* Tristate all pins */
/* Set DATA and CLOCK lines to inputs */
BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;
BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
/* Tristate DATA and CLOCK lines */
BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
#endif
}

View file

@ -58,7 +58,7 @@
/* Defines: */
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
#define XPROG_VIA_HARDWARE_USART
#else
#else
#define BITBANG_PDIDATA_PORT PORTB
#define BITBANG_PDIDATA_DDR DDRB
#define BITBANG_PDIDATA_PIN PINB
@ -80,8 +80,11 @@
#define BITBANG_TPICLOCK_MASK (1 << 1)
#endif
/** Serial carrier TPI/PDI speed when hardware TPI/PDI mode is used */
#define XPROG_HARDWARE_SPEED 500000
/** Number of cycles between each clock when software USART mode is used */
#define BITS_BETWEEN_USART_CLOCKS 80
#define BITS_BETWEEN_USART_CLOCKS 100
/** Total number of bits in a single USART frame */
#define BITS_IN_USART_FRAME 12

View file

@ -66,7 +66,7 @@ MCU = at90usb1287
# Target board (see library "Board Types" documentation, NONE for projects not requiring
# LUFA board drivers). If USER is selected, put custom board drivers in a directory called
# "Board" inside the application directory.
BOARD = XPLAIN
BOARD = USBKEY
# Processor frequency.