Bugfixes with the protocol.
- Bitmasks need to be equal, not just result in non-zero - Only read status once in case it changes under us - Logical and not binary and when checking for acks on sending - We need to stop the bus when receiving the last byte - Force the bus into idle mode when we are Initing
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					 2 changed files with 21 additions and 12 deletions
				
			
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			@ -34,6 +34,10 @@
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#define  __INCLUDE_FROM_TWI_C
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#include "../TWI.h"
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static inline bool bitmask_is_set(uint8_t byte, uint8_t mask) {
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  return (byte & mask) == mask;
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}
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uint8_t TWI_StartTransmission(TWI_t *twi,
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                              const uint8_t SlaveAddress,
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                              const uint8_t TimeoutMS)
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			@ -45,22 +49,25 @@ uint8_t TWI_StartTransmission(TWI_t *twi,
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  TimeoutRemaining = (TimeoutMS * 100);
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  while (TimeoutRemaining)
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  {
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    if (twi->MASTER.STATUS & (TWI_MASTER_WIF_bm | TWI_MASTER_ARBLOST_bm)) 
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    uint8_t status = twi->MASTER.STATUS;
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    if (bitmask_is_set(status, TWI_MASTER_WIF_bm | TWI_MASTER_ARBLOST_bm))
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    {
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      // Case 1: Arbitration lost.  Try again. (or error)
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      twi->MASTER.ADDR = SlaveAddress;
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    }
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    else if (twi->MASTER.STATUS & (TWI_MASTER_WIF_bm | TWI_MASTER_RXACK_bm))
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    else if (bitmask_is_set(status, TWI_MASTER_WIF_bm | TWI_MASTER_RXACK_bm))
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    {
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      // Case 2: No response from slave.
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      // We need to release the bus.
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      TWI_StopTransmission(twi);
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      return TWI_ERROR_SlaveResponseTimeout;
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    }
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    else if (twi->MASTER.STATUS & (TWI_MASTER_WIF_bm))
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    else if (status & TWI_MASTER_WIF_bm)
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    {
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      // Case 3: Slave ACK the Write. Ready!
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      return TWI_ERROR_NoError;
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    }
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    else if (twi->MASTER.STATUS & (TWI_MASTER_RIF_bm))
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    else if (status & TWI_MASTER_RIF_bm)
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    {
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      // Case 4: Slave ACK the Read. Ready! (a byte will be read)
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      return TWI_ERROR_NoError;
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			@ -73,7 +80,7 @@ uint8_t TWI_StartTransmission(TWI_t *twi,
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  if (!(TimeoutRemaining)) {
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    if (twi->MASTER.STATUS & TWI_MASTER_CLKHOLD_bm) {
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      // Release the bus if we're holding it.
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      twi->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
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      TWI_StopTransmission(twi);
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    }
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  }
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  return TWI_ERROR_BusCaptureTimeout;
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			@ -84,20 +91,20 @@ bool TWI_SendByte(TWI_t *twi, const uint8_t Byte)
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  // We assume we're ready to write!
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  twi->MASTER.DATA = Byte;
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  while (!(twi->MASTER.STATUS & TWI_MASTER_WIF_bm));
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  return (twi->MASTER.STATUS & TWI_MASTER_WIF_bm) & !(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm);
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  return (twi->MASTER.STATUS & TWI_MASTER_WIF_bm) && !(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm);
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}
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bool TWI_ReceiveByte(TWI_t *twi, uint8_t* const Byte,
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					 const bool LastByte)
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{
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  // If we're here, we should already be reading.  Wait if we haven't read yet.
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  if (twi->MASTER.STATUS & (TWI_MASTER_BUSERR_bm | TWI_MASTER_ARBLOST_bm)) {
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  if (bitmask_is_set(twi->MASTER.STATUS, TWI_MASTER_BUSERR_bm | TWI_MASTER_ARBLOST_bm)) {
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    return false;
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  }
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  while (!(twi->MASTER.STATUS & TWI_MASTER_RIF_bm));
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  *Byte = twi->MASTER.DATA;
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  if (LastByte)
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    twi->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_RECVTRANS_gc;
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    twi->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
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  else
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    twi->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc;
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  return true;
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			@ -137,8 +144,8 @@ uint8_t TWI_ReadPacket(TWI_t *twi,
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				}
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			}
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			TWI_StopTransmission(twi);
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		}
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    TWI_StopTransmission(twi);
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	}
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	return ErrorCode;
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			@ -153,7 +160,6 @@ uint8_t TWI_WritePacket(TWI_t *twi,
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                        uint8_t Length)
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{
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	uint8_t ErrorCode;
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	if ((ErrorCode = TWI_StartTransmission(twi, (SlaveAddress & TWI_DEVICE_ADDRESS_MASK) | TWI_ADDRESS_WRITE,
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	                                       TimeoutMS)) == TWI_ERROR_NoError)
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	{
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			@ -184,8 +184,11 @@
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			static inline void TWI_Init(TWI_t *twi, const uint8_t Baud) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1);
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			static inline void TWI_Init(TWI_t *twi, const uint8_t Baud)
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			{
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        twi->CTRL = 0x00;
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        twi->MASTER.BAUD = Baud;
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        twi->MASTER.CTRLA |= TWI_MASTER_ENABLE_bm;
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        twi->MASTER.CTRLA = TWI_MASTER_ENABLE_bm;
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        twi->MASTER.CTRLB = 0;
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        twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc;
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			}
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			/** Turns off the TWI driver hardware. If this is called, any further TWI operations will require a call to
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			@ -206,7 +209,7 @@
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			static inline void TWI_StopTransmission(TWI_t *twi) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1);
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			static inline void TWI_StopTransmission(TWI_t *twi)
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			{
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        twi->MASTER.CTRLC = TWI_MASTER_CMD_STOP_gc;
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        twi->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
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			}
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		/* Function Prototypes: */
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