refactor, non-working
This commit is contained in:
Jack Humbert
parent
76e0d23887
commit
6380f83190
9 changed files with 186 additions and 154 deletions
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@ -19,7 +19,7 @@ void i2c_init(void)
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//TWBR = 10;
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}
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i2c_status_t i2c_start(uint8_t address, uint8_t timeout)
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i2c_status_t i2c_start(uint8_t address, uint16_t timeout)
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{
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// reset TWI control register
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TWCR = 0;
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@ -28,13 +28,13 @@ i2c_status_t i2c_start(uint8_t address, uint8_t timeout)
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uint16_t timeout_timer = timer_read();
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while( !(TWCR & (1<<TWINT)) ) {
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if (timeout && (timer_read() - timeout_timer) > timeout) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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// check if the start condition was successfully transmitted
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if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return 1; }
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if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return I2C_STATUS_ERROR; }
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// load slave address into data register
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TWDR = address;
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@ -43,19 +43,19 @@ i2c_status_t i2c_start(uint8_t address, uint8_t timeout)
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timeout_timer = timer_read();
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while( !(TWCR & (1<<TWINT)) ) {
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if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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// check if the device has acknowledged the READ / WRITE mode
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uint8_t twst = TW_STATUS & 0xF8;
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if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1;
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if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return I2C_STATUS_ERROR;
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return 0;
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return I2C_STATUS_SUCCESS;
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}
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i2c_status_t i2c_write(uint8_t data, uint8_t timeout)
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i2c_status_t i2c_write(uint8_t data, uint16_t timeout)
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{
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// load data into data register
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TWDR = data;
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@ -64,17 +64,17 @@ i2c_status_t i2c_write(uint8_t data, uint8_t timeout)
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uint16_t timeout_timer = timer_read();
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while( !(TWCR & (1<<TWINT)) ) {
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if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return 1; }
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if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return I2C_STATUS_ERROR; }
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return 0;
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return I2C_STATUS_SUCCESS;
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}
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i2c_status_t i2c_read_ack(uint8_t timeout)
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int16_t i2c_read_ack(uint16_t timeout)
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{
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// start TWI module and acknowledge data after reception
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@ -82,7 +82,7 @@ i2c_status_t i2c_read_ack(uint8_t timeout)
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uint16_t timeout_timer = timer_read();
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while( !(TWCR & (1<<TWINT)) ) {
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if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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@ -91,7 +91,7 @@ i2c_status_t i2c_read_ack(uint8_t timeout)
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return TWDR;
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}
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i2c_status_t i2c_read_nack(uint8_t timeout)
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int16_t i2c_read_nack(uint16_t timeout)
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{
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// start receiving without acknowledging reception
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@ -99,7 +99,7 @@ i2c_status_t i2c_read_nack(uint8_t timeout)
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uint16_t timeout_timer = timer_read();
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while( !(TWCR & (1<<TWINT)) ) {
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if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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@ -108,81 +108,112 @@ i2c_status_t i2c_read_nack(uint8_t timeout)
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return TWDR;
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}
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i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length)
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i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout)
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{
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if (i2c_start(address | I2C_WRITE)) return 1;
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i2c_status_t status = i2c_start(address | I2C_WRITE, timeout);
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if (status) return status;
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for (uint16_t i = 0; i < length; i++)
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{
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if (i2c_write(data[i])) return 1;
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for (uint16_t i = 0; i < length; i++) {
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status = i2c_write(data[i], timeout);
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if (status) return status;
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}
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i2c_stop();
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status = i2c_stop(timeout);
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if (status) return status;
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return 0;
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return I2C_STATUS_SUCCESS;
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}
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uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length)
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i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout)
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{
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if (i2c_start(address | I2C_READ)) return 1;
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i2c_status_t status = i2c_start(address | I2C_READ, timeout);
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if (status) return status;
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for (uint16_t i = 0; i < (length-1); i++)
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{
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data[i] = i2c_read_ack();
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}
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data[(length-1)] = i2c_read_nack();
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i2c_stop();
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return 0;
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}
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uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
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{
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if (i2c_start(devaddr | 0x00)) return 1;
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i2c_write(regaddr);
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for (uint16_t i = 0; i < length; i++)
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{
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if (i2c_write(data[i])) return 1;
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for (uint16_t i = 0; i < (length-1); i++) {
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status = i2c_read_ack(timeout);
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if (status >= 0) {
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data[i] = status;
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} else {
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return status;
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}
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}
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i2c_stop();
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status = i2c_read_nack(timeout);
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if (status >= 0 ) {
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data[(length-1)] = status;
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} else {
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return status;
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}
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return 0;
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status = i2c_stop(timeout);
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if (status) return status;
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return I2C_STATUS_SUCCESS;
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}
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uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length)
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i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
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{
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if (i2c_start(devaddr)) return 1;
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i2c_status_t status = i2c_start(devaddr | 0x00, timeout);
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if (status) return status;
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i2c_write(regaddr);
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status = i2c_write(regaddr, timeout);
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if (status) return status;
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if (i2c_start(devaddr | 0x01)) return 1;
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for (uint16_t i = 0; i < (length-1); i++)
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{
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data[i] = i2c_read_ack();
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for (uint16_t i = 0; i < length; i++) {
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status = i2c_write(data[i], timeout);
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if (status) return status;
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}
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data[(length-1)] = i2c_read_nack();
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i2c_stop();
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status = i2c_stop(timeout);
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if (status) return status;
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return 0;
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return I2C_STATUS_SUCCESS;
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}
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i2c_status_t i2c_stop(uint8_t timeout)
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i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout)
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{
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i2c_status_t status = i2c_start(devaddr, timeout);
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if (status) return status;
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status = i2c_write(regaddr, timeout);
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if (status) return status;
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status = i2c_start(devaddr | 0x01, timeout);
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if (status) return status;
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for (uint16_t i = 0; i < (length-1); i++) {
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status = i2c_read_ack(timeout);
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if (status >= 0) {
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data[i] = status;
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} else {
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return status;
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}
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}
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status = i2c_read_nack(timeout);
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if (status >= 0 ) {
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data[(length-1)] = status;
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} else {
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return status;
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}
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status = i2c_stop(timeout);
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if (status) return status;
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return I2C_STATUS_SUCCESS;
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}
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i2c_status_t i2c_stop(uint16_t timeout)
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{
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// transmit STOP condition
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TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
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uint16_t timeout_timer = timer_read();
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while(TWCR & (1<<TWSTO)) {
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if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) {
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if (timeout && ((timer_read() - timeout_timer) > timeout)) {
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return I2C_STATUS_TIMEOUT;
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}
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}
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return 0;
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return I2C_STATUS_SUCCESS;
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}
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@ -8,20 +8,21 @@
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#define I2C_READ 0x01
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#define I2C_WRITE 0x00
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typedef i2c_status_t int16_t
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#define I2C_STATUS_TIMEOUT (-1)
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typedef int16_t i2c_status_t;
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#define I2C_NO_TIMEOUT 0
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#define I2C_STATUS_SUCCESS (0)
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#define I2C_STATUS_ERROR (-1)
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#define I2C_STATUS_TIMEOUT (-2)
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void i2c_init(void);
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i2c_status_t i2c_start(uint8_t address, uint8_t timeout);
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i2c_status_t i2c_write(uint8_t data, uint8_t timeout);
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i2c_status_t i2c_read_ack(uint8_t timeout);
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i2c_status_t i2c_read_nack(uint8_t timeout);
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uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length);
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uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length);
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uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
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uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length);
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i2c_status_t i2c_stop(uint8_t timeout);
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i2c_status_t i2c_start(uint8_t address, uint16_t timeout);
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i2c_status_t i2c_write(uint8_t data, uint16_t timeout);
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int16_t i2c_read_ack(uint16_t timeout);
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int16_t i2c_read_nack(uint16_t timeout);
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i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
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i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
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i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
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i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
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i2c_status_t i2c_stop(uint16_t timeout);
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#endif // I2C_MASTER_H
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@ -49,6 +49,14 @@
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#define ISSI_COMMANDREGISTER 0xFD
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#define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine'
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#ifndef ISSI_TIMEOUT
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#define ISSI_TIMEOUT 100
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#endif
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#ifndef ISSI_PERSISTENCE
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#define ISSI_PERSISTENCE 0
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#endif
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// Transfer buffer for TWITransmitData()
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uint8_t g_twi_transfer_buffer[20];
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@ -78,100 +86,104 @@ bool g_led_control_registers_update_required = false;
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// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
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uint8_t IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
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void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data )
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{
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g_twi_transfer_buffer[0] = reg;
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g_twi_transfer_buffer[1] = data;
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//Transmit data until succesful
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//while(i2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0);
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return i2c_transmit(addr << 1, g_twi_transfer_buffer,2);
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#if ISSI_PERSISTENCE > 0
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0)
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break;
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}
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#else
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i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT);
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#endif
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}
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uint8_t IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
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void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
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{
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uint8_t ret = 0;
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// assumes bank is already selected
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// transmit PWM registers in 9 transfers of 16 bytes
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// g_twi_transfer_buffer[] is 20 bytes
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// iterate over the pwm_buffer contents at 16 byte intervals
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for ( int i = 0; i < 144; i += 16 )
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{
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for ( int i = 0; i < 144; i += 16 ) {
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// set the first register, e.g. 0x24, 0x34, 0x44, etc.
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g_twi_transfer_buffer[0] = 0x24 + i;
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// copy the data from i to i+15
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// device will auto-increment register for data after the first byte
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// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
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for ( int j = 0; j < 16; j++ )
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{
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for ( int j = 0; j < 16; j++ ) {
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g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
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}
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//Transmit buffer until succesful
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//while(i2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0);
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ret |= i2c_transmit(addr << 1, g_twi_transfer_buffer, 17);
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#if ISSI_PERSISTENCE > 0
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for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
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if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0)
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break;
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}
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#else
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i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT);
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#endif
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}
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return ret;
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}
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uint8_t IS31FL3731_init( uint8_t addr )
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void IS31FL3731_init( uint8_t addr )
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{
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uint8_t ret = 0;
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// In order to avoid the LEDs being driven with garbage data
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// in the LED driver's PWM registers, first enable software shutdown,
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// then set up the mode and other settings, clear the PWM registers,
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// then disable software shutdown.
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// select "function register" bank
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
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// enable software shutdown
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ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
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IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 );
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// this delay was copied from other drivers, might not be needed
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_delay_ms( 10 );
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// picture mode
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ret |= IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
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IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE );
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// display frame 0
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ret |= IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
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IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 );
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// audio sync off
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ret |= IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
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IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 );
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// select bank 0
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ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
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// turn off all LEDs in the LED control register
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for ( int i = 0x00; i <= 0x11; i++ )
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{
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ret |= IS31FL3731_write_register( addr, i, 0x00 );
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IS31FL3731_write_register( addr, i, 0x00 );
|
||||
}
|
||||
|
||||
// turn off all LEDs in the blink control register (not really needed)
|
||||
for ( int i = 0x12; i <= 0x23; i++ )
|
||||
{
|
||||
ret |= IS31FL3731_write_register( addr, i, 0x00 );
|
||||
IS31FL3731_write_register( addr, i, 0x00 );
|
||||
}
|
||||
|
||||
// set PWM on all LEDs to 0
|
||||
for ( int i = 0x24; i <= 0xB3; i++ )
|
||||
{
|
||||
ret |= IS31FL3731_write_register( addr, i, 0x00 );
|
||||
IS31FL3731_write_register( addr, i, 0x00 );
|
||||
}
|
||||
|
||||
// select "function register" bank
|
||||
ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
|
||||
IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG );
|
||||
|
||||
// disable software shutdown
|
||||
ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
|
||||
IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 );
|
||||
|
||||
// select bank 0 and leave it selected.
|
||||
// most usage after initialization is just writing PWM buffers in bank 0
|
||||
// as there's not much point in double-buffering
|
||||
ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
|
||||
IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 );
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
|
||||
|
|
@ -224,32 +236,27 @@ void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, b
|
|||
|
||||
g_led_control_registers_update_required = true;
|
||||
|
||||
|
||||
}
|
||||
|
||||
uint8_t IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
|
||||
void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
if ( g_pwm_buffer_update_required )
|
||||
{
|
||||
ret |= IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
|
||||
ret |= IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
|
||||
IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] );
|
||||
IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] );
|
||||
}
|
||||
g_pwm_buffer_update_required = false;
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint8_t IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
|
||||
void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
if ( g_led_control_registers_update_required )
|
||||
{
|
||||
for ( int i=0; i<18; i++ )
|
||||
{
|
||||
ret |= IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
|
||||
ret |= IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
|
||||
IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] );
|
||||
IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] );
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -31,9 +31,9 @@ typedef struct is31_led {
|
|||
|
||||
extern const is31_led g_is31_leds[DRIVER_LED_TOTAL];
|
||||
|
||||
uint8_t IS31FL3731_init( uint8_t addr );
|
||||
uint8_t IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data );
|
||||
uint8_t IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer );
|
||||
void IS31FL3731_init( uint8_t addr );
|
||||
void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data );
|
||||
void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer );
|
||||
|
||||
void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue );
|
||||
void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue );
|
||||
|
|
@ -44,8 +44,8 @@ void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, b
|
|||
// (eg. from a timer interrupt).
|
||||
// Call this while idle (in between matrix scans).
|
||||
// If the buffer is dirty, it will update the driver with the buffer.
|
||||
uint8_t IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 );
|
||||
uint8_t IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 );
|
||||
void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 );
|
||||
void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 );
|
||||
|
||||
#define C1_1 0x24
|
||||
#define C1_2 0x25
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue