Merge remote-tracking branch 'origin/master' into develop
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						490fa5a9e3
					
				
					 11 changed files with 255 additions and 174 deletions
				
			
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			@ -32,18 +32,20 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
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#define MATRIX_ROWS 11
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#define MATRIX_COLS 8
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#define MATRIX_ROW_PINS { B04, B05, B06, B07, B08, B09, A10, A11, B10, B11, B12 }
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#define MATRIX_COL_PINS { A00, A01, A02, A03, A04, A05, A06, A07 }
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#define UNUSED_PINS
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/* COL2ROW, ROW2COL */
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#define DIODE_DIRECTION COL2ROW
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/* Temporary solution for matrix delay */
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#define IGNORE_ATOMIC_BLOCK
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/* MCU Port name definitions */
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#define PA 0
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#define PB 1
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/* Port and Pin definition of key row hardware configuration */
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#define MATRIX_ROW_PORTS PB, PB, PB, PB, PB, PB, PA, PA, PB, PB, PB
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#define MATRIX_ROW_PINS   4,  5,  6,  7,  8,  9, 10, 11, 10, 11, 12
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/* Port and Pin definition of key column hardware configuration */
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#define MATRIX_COL_PORTS PA, PA, PA, PA, PA, PA, PA, PA
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#define MATRIX_COL_PINS   0,  1,  2,  3,  4,  5,  6,  7
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/* This Shift Register expands available hardware output lines to control additional peripherals */
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/* It uses four lines from the MCU to provide 16 output lines */
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/* Shift Register Clock configuration (MCU to ShiftRegister.RCLK) */
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										21
									
								
								keyboards/massdrop/ctrl/ctrl.c
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										21
									
								
								keyboards/massdrop/ctrl/ctrl.c
									
										
									
									
									
										Normal file
									
								
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			@ -0,0 +1,21 @@
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/*
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Copyright 2021 Massdrop Inc.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ctrl.h"
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/* Temporary solution for matrix delay */
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void matrix_output_select_delay(void) { matrix_io_delay(); }
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void matrix_output_unselect_delay(void) { }
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			@ -1,76 +0,0 @@
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/*
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Copyright 2018 Massdrop Inc.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ctrl.h"
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#include "d51_util.h"
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const uint8_t row_ports[] = {MATRIX_ROW_PORTS};
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const uint8_t row_pins[]  = {MATRIX_ROW_PINS};
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const uint8_t col_ports[] = {MATRIX_COL_PORTS};
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const uint8_t col_pins[]  = {MATRIX_COL_PINS};
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uint32_t      row_masks[2];  // NOTE: If more than PA PB used in the future, adjust code to accommodate
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void matrix_init_custom(void) {
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    row_masks[PA] = 0;
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    row_masks[PB] = 0;
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    for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
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        PORT->Group[row_ports[row]].DIRCLR.reg                       = 1 << row_pins[row];  // Input
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        PORT->Group[row_ports[row]].OUTCLR.reg                       = 1 << row_pins[row];  // Low
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        PORT->Group[row_ports[row]].PINCFG[row_pins[row]].bit.INEN   = 1;                   // Input Enable,
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        PORT->Group[row_ports[row]].PINCFG[row_pins[row]].bit.PULLEN = 1;                   // Pull Enable
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        row_masks[row_ports[row]] |= 1 << row_pins[row];                                    // Add pin to proper row mask
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    }
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    for (uint8_t col = 0; col < MATRIX_COLS; col++) {
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        PORT->Group[col_ports[col]].DIRSET.reg = 1 << col_pins[col];  // Output
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        PORT->Group[col_ports[col]].OUTCLR.reg = 1 << col_pins[col];  // Low
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    }
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}
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bool matrix_scan_custom(matrix_row_t current_matrix[]) {
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    matrix_row_t raw[MATRIX_ROWS] = {0};
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    uint32_t     scans[2];  // PA PB
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    for (uint8_t col = 0; col < MATRIX_COLS; col++) {
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        PORT->Group[col_ports[col]].OUTSET.reg = 1 << col_pins[col];  // Set col output
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        matrix_io_delay();  // Delay for output
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        scans[PA] = PORT->Group[PA].IN.reg & row_masks[PA];  // Read PA row pins data
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        scans[PB] = PORT->Group[PB].IN.reg & row_masks[PB];  // Read PB row pins data
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        PORT->Group[col_ports[col]].OUTCLR.reg = 1 << col_pins[col];  // Clear col output
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        for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
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            // Move scan bits from scans array into proper row bit locations
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            if (scans[row_ports[row]] & (1 << row_pins[row])) {
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                raw[row] |= 1 << col;
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            }
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        }
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    }
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    bool changed = false;
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    for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
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        if (current_matrix[row] != raw[row]) {
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            current_matrix[row] = raw[row];
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            changed             = true;
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        }
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    }
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    return changed;
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}
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			@ -1,13 +1,10 @@
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# project specific files
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SRC = matrix.c
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SRC += config_led.c
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#For platform and packs
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ARM_ATSAM = SAMD51J18A
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MCU = cortex-m4
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CUSTOM_MATRIX = lite
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# Build Options
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#   comment out to disable the options.
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#
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