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Add new ARCH option to the makefiles to (eventually) specify the target device architecture. Update non-usb peripheral drivers to reflect future multiple architecture support.

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This commit is contained in:
Dean Camera 2011-02-19 18:37:22 +00:00
parent 100a197d0e
commit 3d4d8e7f62
196 changed files with 1271 additions and 730 deletions
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197
LUFA/Drivers/Peripheral/SPI.h
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@ -31,201 +31,44 @@
/** \file
* \brief Master include file for the SPI peripheral driver.
*
* Hardware SPI subsystem driver for the supported USB AVRs models.
* This file is the master dispatch header file for the device-specific SPI driver, for microcontrollers
* containing a hardware SPI.
*
* User code should include this file, which will in turn include the correct SPI driver header file for the
* currently selected architecture and microcontroller model.
*/
/** \ingroup Group_PeripheralDrivers
* @defgroup Group_SPI SPI Driver - LUFA/Drivers/Peripheral/SPI.h
* \defgroup Group_SPI SPI Driver - LUFA/Drivers/Peripheral/SPI.h
*
* \section Sec_Dependencies Module Source Dependencies
* The following files must be built with any user project that uses this module:
* - None
*
* \section Sec_ModDescription Module Description
* Driver for the hardware SPI port available on most AVR models. This module provides
* an easy to use driver for the setup of and transfer of data over the AVR's SPI port.
* Hardware SPI driver. This module provides an easy to use driver for the setup and transfer of data over
* the selected architecture and microcontroller model's SPI port.
*
* \section Sec_ExampleUsage Example Usage
* The following snippet is an example of how this module may be used within a typical
* application.
*
* \code
* // Initialise the SPI driver before first use
* SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING |
* SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
*
* // Send several bytes, ignoring the returned data
* SPI_SendByte(0x01);
* SPI_SendByte(0x02);
* SPI_SendByte(0x03);
*
* // Receive several bytes, sending a dummy 0x00 byte each time
* uint8_t Byte1 = SPI_ReceiveByte();
* uint8_t Byte2 = SPI_ReceiveByte();
* uint8_t Byte3 = SPI_ReceiveByte();
*
* // Send a byte, and store the received byte from the same transaction
* uint8_t ResponseByte = SPI_TransferByte(0xDC);
* \endcode
*
* @{
* \note The exact API for this driver may vary depending on the target used - see
* individual target module documentation for the API specific to your target processor.
*/
#ifndef __SPI_H__
#define __SPI_H__
/* Includes: */
#include <stdbool.h>
/* Enable C linkage for C++ Compilers: */
#if defined(__cplusplus)
extern "C" {
/* Macros: */
#if !defined(__DOXYGEN__)
#define __INCLUDE_FROM_SPI_H
#endif
/* Private Interface - For use in library only: */
#if !defined(__DOXYGEN__)
/* Macros: */
#define SPI_USE_DOUBLESPEED (1 << SPE)
#endif
/* Includes: */
#include "../../Common/Common.h"
/* Public Interface - May be used in end-application: */
/* Macros: */
/** \name SPI Prescaler Configuration Masks */
//@{
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 2. */
#define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 4. */
#define SPI_SPEED_FCPU_DIV_4 0
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 8. */
#define SPI_SPEED_FCPU_DIV_8 (SPI_USE_DOUBLESPEED | (1 << SPR0))
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 16. */
#define SPI_SPEED_FCPU_DIV_16 (1 << SPR0)
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 32. */
#define SPI_SPEED_FCPU_DIV_32 (SPI_USE_DOUBLESPEED | (1 << SPR1))
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 64. */
#define SPI_SPEED_FCPU_DIV_64 (SPI_USE_DOUBLESPEED | (1 << SPR1) | (1 << SPR0))
/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 128. */
#define SPI_SPEED_FCPU_DIV_128 ((1 << SPR1) | (1 << SPR0))
//@}
/** \name SPI SCK Polarity Configuration Masks */
//@{
/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the rising edge. */
#define SPI_SCK_LEAD_RISING (0 << CPOL)
/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the falling edge. */
#define SPI_SCK_LEAD_FALLING (1 << CPOL)
//@}
/** \name SPI Sample Edge Configuration Masks */
//@{
/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should sampled on the leading edge. */
#define SPI_SAMPLE_LEADING (0 << CPHA)
/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
#define SPI_SAMPLE_TRAILING (1 << CPHA)
//@}
/** \name SPI Data Ordering Configuration Masks */
//@{
/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_MSB_FIRST (0 << DORD)
/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_LSB_FIRST (1 << DORD)
//@}
/** \name SPI Mode Configuration Masks */
//@{
/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
#define SPI_MODE_SLAVE (0 << MSTR)
/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
#define SPI_MODE_MASTER (1 << MSTR)
//@}
/* Inline Functions: */
/** Initialises the SPI subsystem, ready for transfers. Must be called before calling any other
* SPI routines.
*
* \param[in] SPIOptions SPI Options, a mask consisting of one of each of the \c SPI_SPEED_*,
* \c SPI_SCK_*, \c SPI_SAMPLE_*, \c SPI_ORDER_* and \c SPI_MODE_* masks.
*/
static inline void SPI_Init(const uint8_t SPIOptions)
{
DDRB |= ((1 << 1) | (1 << 2));
DDRB &= ~((1 << 0) | (1 << 3));
PORTB |= ((1 << 0) | (1 << 3));
SPCR = ((1 << SPE) | SPIOptions);
if (SPIOptions & SPI_USE_DOUBLESPEED)
SPSR |= (1 << SPI2X);
else
SPSR &= ~(1 << SPI2X);
}
/** Turns off the SPI driver, disabling and returning used hardware to their default configuration. */
static inline void SPI_Disable(void)
{
DDRB &= ~((1 << 1) | (1 << 2));
PORTB &= ~((1 << 0) | (1 << 3));
SPCR = 0;
SPSR = 0;
}
/** Sends and receives a byte through the SPI interface, blocking until the transfer is complete.
*
* \param[in] Byte Byte to send through the SPI interface.
*
* \return Response byte from the attached SPI device.
*/
static inline uint8_t SPI_TransferByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline uint8_t SPI_TransferByte(const uint8_t Byte)
{
SPDR = Byte;
while (!(SPSR & (1 << SPIF)));
return SPDR;
}
/** Sends a byte through the SPI interface, blocking until the transfer is complete. The response
* byte sent to from the attached SPI device is ignored.
*
* \param[in] Byte Byte to send through the SPI interface.
*/
static inline void SPI_SendByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;
static inline void SPI_SendByte(const uint8_t Byte)
{
SPDR = Byte;
while (!(SPSR & (1 << SPIF)));
}
/** Sends a dummy byte through the SPI interface, blocking until the transfer is complete. The response
* byte from the attached SPI device is returned.
*
* \return The response byte from the attached SPI device.
*/
static inline uint8_t SPI_ReceiveByte(void) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
static inline uint8_t SPI_ReceiveByte(void)
{
SPDR = 0x00;
while (!(SPSR & (1 << SPIF)));
return SPDR;
}
/* Disable C linkage for C++ Compilers: */
#if defined(__cplusplus)
}
/* Includes: */
#if (ARCH == ARCH_AVR8)
#include "AVR8/SPI.h"
#else
#error The SPI peripheral driver is not currently available for your selected architecture.
#endif
#endif
/** @} */