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Added MCU support for ArteryTek AT32F415 (#23445)

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HorrorTroll 2024-11-21 13:28:28 +07:00 • committed by GitHub
parent 074bbbfb21
commit 39161b9ee7
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GPG key ID: B5690EEEBB952194
32 changed files with 1065 additions and 63 deletions
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59
platforms/chibios/drivers/spi_master.c
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@ -103,9 +103,15 @@ bool spi_start_extended(spi_start_config_t *start_config) {
roundedDivisor <<= 1;
}
# if defined(AT32F415)
if (roundedDivisor < 2 || roundedDivisor > 1024) {
return false;
}
# else
if (roundedDivisor < 2 || roundedDivisor > 256) {
return false;
}
# endif
#endif
#if defined(K20x) || defined(KL2x)
@ -240,6 +246,59 @@ bool spi_start_extended(spi_start_config_t *start_config) {
spiConfig.SSPCR0 |= SPI_SSPCR0_SPH; // Clock phase: sample on second edge transition
break;
}
#elif defined(AT32F415)
spiConfig.ctrl1 = 0;
if (lsbFirst) {
spiConfig.ctrl1 |= SPI_CTRL1_LTF;
}
switch (mode) {
case 0:
break;
case 1:
spiConfig.ctrl1 |= SPI_CTRL1_CLKPHA;
break;
case 2:
spiConfig.ctrl1 |= SPI_CTRL1_CLKPOL;
break;
case 3:
spiConfig.ctrl1 |= SPI_CTRL1_CLKPHA | SPI_CTRL1_CLKPOL;
break;
}
switch (roundedDivisor) {
case 2:
break;
case 4:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_0;
break;
case 8:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_1;
break;
case 16:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0;
break;
case 32:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2;
break;
case 64:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_0;
break;
case 128:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1;
break;
case 256:
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0;
break;
case 512:
spiConfig.ctrl2 |= SPI_CTRL1_MDIV_3;
break;
case 1024:
spiConfig.ctrl2 |= SPI_CTRL1_MDIV_3;
spiConfig.ctrl1 |= SPI_CTRL1_MDIV_0;
break;
}
#else
spiConfig.cr1 = 0;