Use -pedantic compile time option to find and correct several minor code errors.

This commit is contained in:
Dean Camera 2009-12-13 14:09:25 +00:00
parent 307ba254d5
commit 3705330dd3
16 changed files with 121 additions and 66 deletions

View file

@ -218,7 +218,14 @@ static void PDIProtocol_ReadMemory(void)
Endpoint_ClearOUT();
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
// TODO: Send read command here via PDI protocol
if (ReadMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)
{
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CMD);
PDITarget_SendByte(NVM_CMD_READUSERSIG);
}
Endpoint_Write_Byte(CMD_XPROG);
Endpoint_Write_Byte(XPRG_CMD_READ_MEM);
@ -233,15 +240,46 @@ static void PDIProtocol_ReadMemory(void)
static void PDIProtocol_ReadCRC(void)
{
uint8_t ReturnStatus = XPRG_ERR_OK;
uint8_t CRCType = Endpoint_Read_Byte();
struct
{
uint8_t CRCType;
} ReadCRC_XPROG_Params;
Endpoint_Read_Stream_LE(&ReadCRC_XPROG_Params, sizeof(ReadCRC_XPROG_Params));
Endpoint_ClearOUT();
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
uint32_t MemoryCRC = 0;
uint8_t CRCReadCommand;
if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)
CRCReadCommand = NVM_CMD_APPCRC;
else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)
CRCReadCommand = NVM_CMD_BOOTCRC;
else
CRCReadCommand = NVM_CMD_FLASHCRC;
// TODO: Read device CRC for desired memory via PDI protocol
/* Set the NVM command to the correct CRC read command */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CMD);
PDITarget_SendByte(CRCReadCommand);
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_CTRLA);
PDITarget_SendByte(1 << 0);
/* Wait until the NVM bus and controller is no longer busy */
PDITarget_WaitWhileNVMBusBusy();
PDITarget_WaitWhileNVMControllerBusy();
/* Read the three byte generated CRC value */
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_3BYTES << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_DAT0);
MemoryCRC = PDITarget_ReceiveByte();
MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
Endpoint_Write_Byte(CMD_XPROG);
Endpoint_Write_Byte(XPRG_CMD_CRC);

View file

@ -304,7 +304,7 @@ void PDITarget_WaitWhileNVMControllerBusy(void)
for (;;)
{
PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_BASE | 0x0F);
PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_STATUS);
if (!(PDITarget_ReceiveByte() & (1 << 7)))
return;

View file

@ -104,6 +104,23 @@
#define USER_SIGNATURE_BASE 0x008E0400
#define DATAMEM_NVM_BASE 0x01C0
#define DATAMEM_NVM_ADDR0 (DATAMEM_NVM_BASE | 0x00)
#define DATAMEM_NVM_ADDR1 (DATAMEM_NVM_BASE | 0x01)
#define DATAMEM_NVM_ADDR2 (DATAMEM_NVM_BASE | 0x02)
#define DATAMEM_NVM_DAT0 (DATAMEM_NVM_BASE | 0x04)
#define DATAMEM_NVM_DAT1 (DATAMEM_NVM_BASE | 0x05)
#define DATAMEM_NVM_DAT2 (DATAMEM_NVM_BASE | 0x06)
#define DATAMEM_NVM_CMD (DATAMEM_NVM_BASE | 0x0A)
#define DATAMEM_NVM_CTRLA (DATAMEM_NVM_BASE | 0x0B)
#define DATAMEM_NVM_CTRLB (DATAMEM_NVM_BASE | 0x0C)
#define DATAMEM_NVM_INTCTRL (DATAMEM_NVM_BASE | 0x0D)
#define DATAMEM_NVM_STATUS (DATAMEM_NVM_BASE | 0x0F)
#define DATAMEM_NVM_LOCKBITS (DATAMEM_NVM_BASE | 0x10)
#define NVM_CMD_APPCRC 0x38
#define NVM_CMD_BOOTCRC 0x39
#define NVM_CMD_FLASHCRC 0x78
#define NVM_CMD_READUSERSIG 0x03
/* Function Prototypes: */
void PDITarget_EnableTargetPDI(void);
@ -112,8 +129,8 @@
uint8_t PDITarget_ReceiveByte(void);
void PDITarget_SendBreak(void);
void PDITarget_SendAddress(uint32_t Address);
bool PDITarget_WaitWhileNVMBusBusy(void);
void PDITarget_WaitWhileNVMControllerBusy(void);
void PDITarget_SendAddress(uint32_t Address);
bool PDITarget_WaitWhileNVMBusBusy(void);
void PDITarget_WaitWhileNVMControllerBusy(void);
#endif