PDI NVM enable is fast enough that bare polling is enough without a fixed delay in between each attempt. Make sure the USART transmitter is enabled explicitly when the USART is configured, so that repeated attempts to re-enter PDI mode don't fail due to TXEN not being set.
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					 2 changed files with 6 additions and 6 deletions
				
			
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			@ -115,11 +115,9 @@ static void PDIProtocol_EnterXPROGMode(void)
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	  PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
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	/* Poll the STATUS register to check to see if NVM access has been enabled */
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	uint8_t NVMAttemptsRemaining = 150;
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	uint8_t NVMAttemptsRemaining = 255;
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	while (NVMAttemptsRemaining)
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	{
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		_delay_ms(1);
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		PDITarget_SendByte(PDI_CMD_LDCS | PD_STATUS_REG);
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		if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
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		  break;
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			@ -173,6 +173,7 @@ void PDITarget_EnableTargetPDI(void)
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	/* Set up the synchronous USART for XMEGA communications - 
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	   8 data bits, even parity, 2 stop bits */
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	UBRR1  = 10;
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	UCSR1B = (1 << TXEN1);
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	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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	/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
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			@ -182,9 +183,10 @@ void PDITarget_EnableTargetPDI(void)
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void PDITarget_DisableTargetPDI(void)
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{
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	/* Turn of receiver and transmitter of the USART, clear settings */
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	UCSR1B = 0;
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	UCSR1C = 0;
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	/* Turn off receiver and transmitter of the USART, clear settings */
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	UCSR1A |= (1 << TXC1) | (1 << RXC1);
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	UCSR1B  = 0;
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	UCSR1C  = 0;
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	/* Set all USART lines as input, tristate */
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	DDRD  &= ~((1 << 5) | (1 << 3));
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